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path: root/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
AgeCommit message (Expand)Author
2022-09-13drm/amdgpu: Don't enable LTR if not supportedLijo Lazar
2022-07-18drm/amdgpu: use the same HDP flush registers for all nbio 2.3.xAlex Deucher
2022-06-03drm/amdgpu: convert nbio_v2_3_clear_doorbell_interrupt() to IP versionAlex Deucher
2022-04-08drm/amdgpu: expand cg_flags from u32 to u64Evan Quan
2021-11-24drm/amdgpu: Fix MMIO HDP flush on SRIOVFelix Kuehling
2021-10-13drm/amdgpu/nbio2.3: don't use GPU_HDP_FLUSH bit 12Alex Deucher
2021-07-23drm/amdgpu: Clear doorbell interrupt status for Sienna CichlidChengzhe Liu
2021-06-30drm/amdgpu: correct clock gating settings on feature unsupportedEvan Quan
2021-06-30drm/amdgpu: fix the hang caused by PCIe link width switchEvan Quan
2021-06-30drm/amdgpu: fix NAK-G generation during PCI-e link width switchEvan Quan
2021-02-09drm/amdgpu: support ASPM for some specific ASICLikun Gao
2021-01-05drm/amdgpu: remove redundant logic related HDPLikun Gao
2020-11-10drm/amd/amdgpu: Add rev_id workaround logic for SRIOV setupBokun Zhang
2020-10-15drm/amdgpu: add interface for setting ASPMEvan Quan
2020-07-01drm/amdgpu: add 2rd VCN instance doorbell supportLeo Liu
2020-06-03drm/amdgpu: add sdma ip block for sienna_cichlid (v5)Likun Gao
2020-04-01drm/amdgpu: cleanup all virtualization detection routineMonk Liu
2019-10-03drm/amdgpu: Add the HDP flush support for NaviYong Zhao
2019-09-13drm/amdgpu: switch to new amdgpu_nbio structureHawking Zhang
2019-07-18drm/amdgpu: add vcn nbio doorbell range setting for 2nd vcn instanceJames Zhu
2019-06-20drm/amdgpu: add nbio v2.3 for navi10 (v4)Hawking Zhang