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path: root/drivers/gpu/drm/i915/display/intel_display_power.c
AgeCommit message (Expand)Author
2021-02-10drm/i915/display: Add DDR5 and LPDDR5 BW buddy page entriesJosé Roberto de Souza
2021-02-02Merge tag 'topic/adl-s-enabling-2021-02-01-1' of git://anongit.freedesktop.or...Jani Nikula
2021-02-01drm/i915/adl_s: Add display WAs for ADL-SAditya Swarup
2021-02-01drm/i915/adl_s: Add power wellsLucas De Marchi
2021-01-20drm/i915/tgl: Use TGL stepping info for applying WAsAditya Swarup
2021-01-14drm/i915/pps: rename intel_power_sequencer_reset to intel_pps_reset_allJani Nikula
2021-01-14drm/i915/pps: abstract panel power sequencer from intel_dp.cJani Nikula
2020-12-03drm/i915: Make intel_display_power_put_unchecked() an internal-only functionImre Deak
2020-12-03drm/i915: Track power reference taken to disable power well functionalityImre Deak
2020-12-03drm/i915: Rename power_domains.wakeref to init_wakerefImre Deak
2020-12-03drm/i915: Factor out helpers to get/put a set of tracked power domainsImre Deak
2020-11-17drm/i915: Tweaked Wa_14010685332 for PCHs used on gen11 platformsBob Paauwe
2020-11-12drm/i915/display: Make get_allowed_dc_mask().max_dc set a chain of if and elsesJosé Roberto de Souza
2020-11-12drm/i915/display: Group DC9 mask setJosé Roberto de Souza
2020-10-20drm/i915: Reorder hpd init vs. display resumeVille Syrjälä
2020-10-19drm/i915/display: Program DBUF_CTL tracker state serviceJosé Roberto de Souza
2020-10-15drm/i915/dg1: DG1 does not support DC6Anshuman Gupta
2020-10-15drm/i915/dg1: Add initial DG1 workaroundsStuart Summers
2020-10-15drm/i915/dg1: Add DG1 power wellsLucas De Marchi
2020-10-15drm/i915/cnl: skip PW_DDI_F on certain skusLucas De Marchi
2020-10-15drm/i915/display: allow to skip certain power wellsAditya Swarup
2020-08-28drm/i915/tgl: Fix stepping WA matchingJosé Roberto de Souza
2020-08-17drm/i915/tgl: Fix TC-cold block/unblock sequenceImre Deak
2020-08-17drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wellsImre Deak
2020-08-17drm/i915: Update bw_buddy pagemask tableMatt Roper
2020-08-17drm/i915: Implement WA 14011294188José Roberto de Souza
2020-07-02drm/i915/display: prefer dig_port to reference intel_digital_portLucas De Marchi
2020-06-26drm/i915/gen12: implement Wa_14011508470Matt Atwood
2020-06-22drm/i915/params: switch to device specific parametersJani Nikula
2020-06-09drm/i915/rkl: RKL uses ABOX0 for pixel transfersMatt Roper
2020-05-20drm/i915/rkl: Add power well supportMatt Roper
2020-05-19drm/i915/display/display_power: Prefer drm_WARN_ON over WARN_ONPankaj Bharadiya
2020-05-16drm/i915: Introduce proper dbuf stateVille Syrjälä
2020-05-16drm/i915: Unify the low level dbuf codeVille Syrjälä
2020-05-16drm/i915: Polish some dbuf debugsVille Syrjälä
2020-04-23drm/i915/icl: Fix timeout handling during TypeC AUX power well enablingImre Deak
2020-04-21drm/i915: drop a bunch of superfluous inlinesJani Nikula
2020-04-20drm/i915: Use single set of AUX powerwell ops for gen11+Matt Roper
2020-04-18drm/i915: Add ICL PG3 PW ID for EHLAnshuman Gupta
2020-04-17drm/i915/tc: Do not warn when aux power well of static TC ports timeoutJosé Roberto de Souza
2020-04-17drm/i915/tc/tgl: Implement TC cold sequencesJosé Roberto de Souza
2020-04-17drm/i915/tc: Skip ref held check for TC legacy aux power wellsJosé Roberto de Souza
2020-04-17drm/i915/tc/icl: Implement TC cold sequencesJosé Roberto de Souza
2020-04-17drm/i915/display: Split hsw_power_well_enable() into twoJosé Roberto de Souza
2020-04-17drm/i915/display: Move out code to return the digital_port of the aux chJosé Roberto de Souza
2020-04-17drm/i915: Power well id for ICL PG3Anshuman Gupta
2020-04-16drm/i915/tgl: TBT AUX should use TC power well opsMatt Roper
2020-04-15drm/i915/tgl: Extend Wa_1409767108:tgl to B0 steppingMatt Roper
2020-03-25drm/i915/display_power: use struct drm_device based loggingJani Nikula
2020-02-26drm/i915/tgl: Allow DC5/DC6 entry while PG2 is activeMatt Roper
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