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path: root/drivers/gpu/drm/i915/display/skl_watermark.h
AgeCommit message (Expand)Author
2024-05-15drm/i915: Handle SKL+ WM/DDB registers next to all other plane registersVille Syrjälä
2024-04-19drm/i915/display: Disable SAGV on bw init, to force QGV point recalculationStanislav Lisovskiy
2024-04-04drm/i915: Use a plain old int for the cdclk/mdclk ratioVille Syrjälä
2024-04-04drm/i915: Implement vblank synchronized MBUS join changesStanislav Lisovskiy
2024-03-15drm/i915: Use container_of_const() for statesVille Syrjälä
2024-03-13drm/i915/xe2lpd: Support MDCLK:CDCLK ratio changesGustavo Sousa
2024-03-13drm/i915: Add mdclk_cdclk_ratio to intel_dbuf_stateGustavo Sousa
2024-02-23drm/i915/lnl: Program PKGC_LATENCY registerSuraj Kandpal
2023-10-07drm/i915: Simplify watermark state checker calling conventionVille Syrjälä
2023-10-07drm/i915: Constify watermark state checkerVille Syrjälä
2023-09-27drm/i915: Introduce skl_watermark_max_latency()Ville Syrjälä
2023-02-16drm/i915: rename intel_pm_types.h -> display/intel_wm_types.hJani Nikula
2023-02-15drm/i915/wm: add .get_hw_state to watermark funcsJani Nikula
2023-02-01drm/i915: Expose SAGV state via debugfsVille Syrjälä
2023-01-25drm/i915/display: add intel_display_limits.h for key enumsJani Nikula
2022-09-13drm/i915/ipc: move IPC debugfs to skl_watermark.cJani Nikula
2022-09-13drm/i915/ipc: refactor and rename IPC functionsJani Nikula
2022-09-09drm/i915: Extract skl_watermark.cVille Syrjälä
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