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Change the wording of this driver wrt. the newest I2C v7 and SMBus 3.2
specifications and replace "master/slave" with more appropriate terms.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
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The driver receives the tx fifo almost empty(aempty) interrupt and
reads the tx_aempty_int_mstat to start a round of data transfer.
The operation of clearing the TX aempty interrupt after completing
a write cycle is added to ensure that the FIFO is truly at almost
empty status when an aempty interrupt is received.
The threshold for fifo almost empty interrupt is defined as 1.
Signed-off-by: Devyn Liu <liudingyuan@huawei.com>
Reviewed-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
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The driver finishes a write cycle by read the fifo tx full status
or write limit decrease to 0. The driver starts to write data to
the FIFO after the I2C FIFO almost empty interrupt is reported.
The threshold for FIFO almost empty interrupt is that the amount
of data in the FIFO is less than or equal to 1.
Reduce write maxwrite to the fifo depth - aempty interrupt
threshold. Limiting the number of data to be written at a time
to remaining fifo capacity.
Signed-off-by: Devyn Liu <liudingyuan@huawei.com>
Reviewed-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang:
"I2C has mainly cleanups this time and a few driver improvements.
Because a lot of developers were on holidays (including myself) it was
a good timing to apply lots of cleanups which would normally cause
merge conflicts with other floating patches. Extra thanks go to Andi
Shyti who backed me up when I was on a four week hiatus. This is also
the reason that some patches were commited later than ideal"
* tag 'i2c-for-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (67 commits)
i2c: at91: Use dev_err_probe() instead of dev_err()
I2C: ali15x3: Do PCI error checks on own line
i2c: Make return value check more accurate and explicit for devm_pinctrl_get()
i2c: designware: Add support for recovery when GPIO need pinctrl
i2c: mlxcpld: Add support for extended transaction length
i2c: mlxcpld: Allow driver to run on ARM64 architecture
i2c: nforce2: Do PCI error check on own line
i2c: sis5595: Do PCI error checks on own line
i2c: qcom-cci: Fix error checking in cci_probe()
i2c: muxes: pca954x: Add regulator support
i2c: muxes: pca954x: Add MAX735x/MAX736x support
dt-bindings: i2c: Add Maxim MAX735x/MAX736x variants
dt-bindings: i2c: pca954x: Correct interrupt support
i2c: pnx: Use devm_platform_get_and_ioremap_resource()
i2c: pxa: Use devm_platform_get_and_ioremap_resource()
i2c: s3c2410: Use devm_platform_get_and_ioremap_resource()
i2c: sh_mobile: Use devm_platform_get_and_ioremap_resource()
i2c: st: Use devm_platform_get_and_ioremap_resource()
i2c: qcom-geni: Convert to devm_platform_ioremap_resource()
i2c: stm32f4: Use devm_platform_get_and_ioremap_resource()
...
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The controller may be shared with other port, for example the firmware.
Handle the interrupt from other sources will cause crash since some
data are not initialized. So only handle the interrupt of the driver's
transfer and discard others.
Fixes: d62fbdb99a85 ("i2c: add support for HiSilicon I2C controller")
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20230801124625.63587-1-yangyicong@huawei.com
Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Use the dev_err_probe function instead of dev_err in the probe function
so that the printed message includes the return value and also handles
-EPROBE_DEFER nicely.
Signed-off-by: Liao Chang <liaochang1@huawei.com>
Reviewed-by: Yicong Yang <yangyicong@hisilicon.com>
Link: https://lore.kernel.org/r/20230808012954.1643834-5-liaochang1@huawei.com
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
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The controller will always generate a completion interrupt when the
transfer is finished normally or not. Currently we use either error or
completion interrupt to finish, this may result the completion
interrupt unhandled and corrupt the next transfer, especially at low
speed mode. Since on error case, the error interrupt will come first
then is the completion interrupt. So only use the completion interrupt
to finish the whole transfer process.
Fixes: d62fbdb99a85 ("i2c: add support for HiSilicon I2C controller")
Reported-by: Sheng Feng <fengsheng5@huawei.com>
Signed-off-by: Sheng Feng <fengsheng5@huawei.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
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After issuing all the messages we can disable the TX_EMPTY interrupts
to avoid handling redundant interrupts. For doing a sinlge bus
detection (i2cdetect -y -r 0) we can reduce ~97% interrupts (before
~12000 after ~400).
Signed-off-by: Sheng Feng <fengsheng5@huawei.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
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The clk_rate attribute is not generic device tree bindings for I2C
busses described in Documentation/devicetree/bindings/i2c/i2c.txt.
It can be managed by clock binding.
Support the driver to obtain clock information by clk_rate or
clock property. Find clock first, if not, fall back to clk_rate.
Signed-off-by: Weilong Chen <chenweilong@huawei.com>
Acked-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
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The HiSilicon I2C controller can be used on embedded platform, which
boot from devicetree.
Signed-off-by: Weilong Chen <chenweilong@huawei.com>
Acked-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
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HZ macros has been centralized in units.h since [1]. Use it to avoid
duplicated definition.
[1] commit e2c77032fcbe ("units: add the HZ macros")
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Add HiSilicon I2C controller driver for the Kunpeng SoC. It provides
the access to the i2c busses, which connects to the eeprom, rtc, etc.
The driver works with IRQ mode, and supports basic I2C features and 10bit
address. The DMA is not supported.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
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