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path: root/drivers/net/wireless/realtek/rtw89/phy.h
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2024-10-01wifi: rtw89: initialize dual HW bands for MLO and control them by linkZong-Zhe Yang
To support MLO, we initialize things on dual HW bands of Wi-Fi 7 chip. And, each link will indicate which HW band it's bound to. So, in link control flow, we control major things based on target link's HW band instead of hardcode like RTW89_PHY_X or RTW89_MAC_X. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240925020119.13170-2-pkshih@realtek.com
2024-09-24wifi: rtw89: refactor STA related func ahead for MLOZong-Zhe Yang
Refactor STA related functions, e.g. add/assoc/disassoc/disconnect/remove to separate most link stuffs into sub-functions for MLO reuse. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240916053158.47350-7-pkshih@realtek.com
2024-09-24wifi: rtw89: refactor VIF related func ahead for MLOZong-Zhe Yang
Refactor VIF related functions, e.g. add/remove/assoc/mapping to separate most link stuffs into sub-functions for MLO reuse. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240916053158.47350-6-pkshih@realtek.com
2024-09-24wifi: rtw89: rename rtw89_vif to rtw89_vif_link ahead for MLOZong-Zhe Yang
This is an intermediate version that is separated from subsequent major MLO changes, so some functions' namings are not really determined here. e.g. struct rtw89_vif_link *vif_to_rtwvif_safe(struct ieee80211_vif *vif) No logic is changed. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240916053158.47350-2-pkshih@realtek.com
2024-09-20wifi: rtw89: 8922a: rfk: support firmware command RX DCK v1 formatPing-Ke Shih
RX DCK stands for receiver DC calibration. The v1 format adds a field to indicate the calibration is for operation channel or an average value for all scanning channels. Update the format accordingly, and increase firmware format sequence to 2. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240913071340.41822-3-pkshih@realtek.com
2024-08-27wifi: rtw89: 8922a: use right chanctx whenever possible in RFK flowZong-Zhe Yang
No longer access chan with hard-code RTW89_CHANCTX_X whenever possible. Instead, obtain the right chanctx from somewhere and use it in RTL8922A RFK (RF calibration) related code. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240819091724.33730-7-pkshih@realtek.com
2024-08-02wifi: rtw89: fix typo of rtw89_phy_ra_updata_XXXZong-Zhe Yang
`updata` should be `update` Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240724052626.12774-5-pkshih@realtek.com
2024-07-05wifi: rtw89: unify the selection logic of RFK table when MCCZong-Zhe Yang
Driver will notify FW the target index of RFK table to use at some moments. When MCC (multi-channel concurrent), the correctness of the notification is especially important. We now unify the selection logic of RFK table as below among chips. 1. check each table if it matches target channel 2. check all tables if any is idle by iterating active channels 3. replace the first table if all are busy unexpectedly Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240702124452.18747-2-pkshih@realtek.com
2024-06-17wifi: rtw89: 8852bx: add extra handles for 8852BT in 8852b_commonPing-Ke Shih
The channel configuration of 8852BT is very similar but a little different to 8852B, so use chip ID as condition to add extra handles including external loss compensation, ADC configurations, spur settings and so on. Don't affect existing 8852BE. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://msgid.link/20240607070659.80263-3-pkshih@realtek.com
2024-02-19wifi: rtw89: 8922a: add set_channel RF partPing-Ke Shih
Configure RF registers according to band, channel, bandwidth. Since this chip will support MLO, it needs check the operating mode to decide paths we are going to configure. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240215055741.14148-4-pkshih@realtek.com
2024-02-19wifi: rtw89: 8922a: add set_channel MAC partPing-Ke Shih
To set channel, add a function to get TXSB (TX subband) that is hardware index to indicate primary channel. Then, configure band, channel, bandwidth and TXSB via registers. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240215055741.14148-2-pkshih@realtek.com
2024-02-12wifi: rtw89: correct PHY register offset for PHY-1Ping-Ke Shih
PHY-1 can be seen as a copy of PHY-0, and the difference is their base register address, so add a function to get offset to access PHY-1. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240209065229.34515-2-pkshih@realtek.com
2024-02-06wifi: rtw89: 8922a: rfk: implement chip_ops to call RF calibrationsPing-Ke Shih
Calling RF calibrations when interface up, connection, switching bands and going to scan. For 8922AE, RF calibrations are moved to firmware, so use H2C commands to trigger RF calibrations and wait for a C2H event to indicate completion. Then, do next RF calibration. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240202030642.108385-10-pkshih@realtek.com
2024-02-06wifi: rtw89: rfk: add H2C command to trigger TSSIPing-Ke Shih
TSSI is short for transmitter signal strength indication, which is a close-loop hardware circuit to feedback actual transmitting power as a reference to adjust power for next transmission. When connecting and switching bands or channels, do TSSI calibration and reset hardware status to output expected power. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240202030642.108385-9-pkshih@realtek.com
2024-02-06wifi: rtw89: rfk: add a completion to wait RF calibration report from C2H eventPing-Ke Shih
The RF calibrations should be executed one by one, so add a completion to ensure one is finish before next. The report from C2H event contains state and optional version, and we only check the state for now. We also care about the time a RF calibration takes, so record start time before asking firmware to do calibration and get the delta time when receiving report. Consider SER recovery, we can't receive C2H event, use half of argument 'ms' as fixed delay that is 2 times of measured maximum time of calibrations. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240202030642.108385-2-pkshih@realtek.com
2024-02-01wifi: rtw89: 8922a: add RF read/write v2Ping-Ke Shih
Implement indirect interface v2 to read/write RF registers via PHY registers for 8922A. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240124033637.12330-5-pkshih@realtek.com
2024-01-23wifi: rtw89: 8922a: add chip_ops related to BB initPing-Ke Shih
The chip_ops::bb_preinit and ::bb_postinit are called before and after loading BB parameters from tables of firmware file. The ::bb_reset is used to reset hardware state, and currently it is not needed by 8922AE so leave it as empty. The ::bb_sethw is to implement conditional parameters. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240120003831.7014-4-pkshih@realtek.com
2024-01-10wifi: rtw89: phy: set channel_info for WiFi 7 chipsPing-Ke Shih
The channel_info is hardware settings to reflect operational status, such as scale factor, report unit, buffer matrix size, RU size and so on. Then, we can get desired reports to do further tuning. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240105064440.36926-1-pkshih@realtek.com
2024-01-10wifi: rtw89: phy: add BB wrapper of TX power for WiFi 7 chipsPing-Ke Shih
TX power is controlled by BB layer basically, but it should interact with MAC layer, so these registers are put on MAC register domain and called BB wrapper, which contains TX power for each MAC ID, OFDMA RU power, and consideration of power type table. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240105064433.36870-1-pkshih@realtek.com
2024-01-10wifi: rtw89: 8922a: add NCTL pre-settings for WiFi 7 chipsPing-Ke Shih
NCTL standing for nano-controller is used to assist RF calibration. Basically, we write settings from a table, but format of the table can't describe register mask and additional conditions, so add a function to set this kind of settings. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240105064422.36812-1-pkshih@realtek.com
2024-01-10wifi: rtw89: phy: add parser to support RX gain dynamic setting flowChung-Hsuan Hung
Add RX gain offset dynamic setting flow according to different bands and bandwidths. RX gain offset values will be different according to different channel bands, therefore, this dynamic mechanism is needed while channel is changed. Add this to parse data from the element of firmware file, and then we can use them easier at runtime. Signed-off-by: Chung-Hsuan Hung <hsuan8331@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240105064228.36580-3-pkshih@realtek.com
2023-12-15wifi: rtw89: add C2H event handlers of RFK log and reportPing-Ke Shih
Trigger a RFK (RF calibration) in firmware by a H2C command, and in progress it reports log and a result finally by C2H events. Firstly, add prototype of the C2H event handlers to have a simple picture of framework. The callers who trigger H2C will wait until a C2H event is received, so we must process these C2H events in receiving process. Thus, mark this kind of C2H events as atomic. Also, timestamp is also useful for debugging, mark C2H events carrying RFK log as atomic as well. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20231213005054.10568-5-pkshih@realtek.com
2023-12-15wifi: rtw89: load RFK log format string from firmware filePing-Ke Shih
To debug RFK (RF calibration) in firmware, it sends log via firmware C2H events to driver with string format ID and four arguments. Load formatted string from firmware file, and the string ID can get back its string. Then, use regular print format to show the message. This firmware element layout looks like +============================================+ | elm ID | elm size | version | | +----------+----------+----------+-----------+ | | nr |rsvd |rfk_id|rsvd| +--------------------------------------------+ | offset[] (__le16 * nr) | | ... | +--------------------------------------------+ | formatted string with null termintor (*nr) | | ... | +============================================+ * a firmware file can contains more than one elements with this element ID named RTW89_FW_ELEMENT_ID_RFKLOG_FMT (19), because many RFK needs its own formatted strings, so add 'rfk_id' to know it belongs to which RFK. * the 'formatted string' just follow 'offset[]' without padding to align 32bits. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20231213005054.10568-4-pkshih@realtek.com
2023-12-15wifi: rtw89: fw: load TX power track tables from fw_elementPing-Ke Shih
The TX power track tables are used to define compensation power reflected to thermal value. Currently, we have 16 (2 * 4 * 2) tables made by combinations of {negative/positive thermal value, 2GHz/2GHz-CCK/5GHz/6GHz, path A/B} Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20231213005054.10568-2-pkshih@realtek.com
2023-11-30wifi: rtw89: phy: dynamically adjust EDCCA thresholdYi-Chen Chen
Add dynamic mechanism EDCCA (Energy Detection Clear Channel Assessment) in track work. Using a fixed-value threshold will make EDCCA particularly sensitive and cause failure to transmit under certain circumstances. Therefore, the threshold is dynamically adjusted to make EDCCA suitable for any situation. However, in some cases, we will adjust the EDCCA threshold to the highest level so that urgent transmissions can be performed successfully, such as scanning. Finally, in order to observe the EDCCA report in time, add the EDCCA perIC register macro and EDCCA HW report analysis. EDCCA logs can be displayed by using the EDCCA debug mask. Signed-off-by: Yi-Chen Chen <jamie_chen@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231122060458.30878-3-pkshih@realtek.com
2023-11-22wifi: rtw89: 8852c: read RX gain offset from efuse for 6GHz channelsPing-Ke Shih
Read calibration values of RX gain offset from efuse, and set them to registers to normalize RX gain for all hardware modules. Then, PHY dynamic mechanism can get expected values to adjust hardware parameters to yield expected performance. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231117024029.113845-5-pkshih@realtek.com
2023-10-19wifi: rtw89: modify the register setting and the flow of CFO trackingCheng-Chieh Hsieh
The register address used for CFO(carrier frequency offset) tracking is different from WiFi 7 series, so we change the way to access it. And we refine the flow of CFO tracking to compatible all WiFi 7 and 6 ICs. Signed-off-by: Cheng-Chieh Hsieh <cj.hsieh@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231016065115.751662-4-pkshih@realtek.com
2023-10-12wifi: rtw89: Add EHT rate mask as parameters of RA H2C commandPing-Ke Shih
Set EHT rate mask to RA (rate adaptive) H2C command according to handshake result. The EHT rate mask format looks like 44 28 12 4 0 +----------------+----------------+--------+----+ | EHT 2SS rate | EHT 1SS rate | OFDM | CCK| +----------------+----------------+--------+----+ Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231011115256.6121-4-pkshih@realtek.com
2023-10-05wifi: rtw89: phy: set TX power RU limit according to chip genZong-Zhe Yang
Wi-Fi 6 chips and Wi-Fi 7 chips have different register design for TX power RU limit. We rename original setting stuffs with a suffix `_ax`, concentrate related enum declaration in phy.h, and implement setting flow for Wi-Fi 7 chips. Then, we set TX power RU limit according to chip generation. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231003015446.14658-6-pkshih@realtek.com
2023-10-05wifi: rtw89: phy: set TX power limit according to chip genZong-Zhe Yang
Wi-Fi 6 chips and Wi-Fi 7 chips have different register design for TX power limit. We rename original setting stuffs with a suffix `_ax`, concentrate related enum declaration in phy.h, and implement setting flow for Wi-Fi 7 chips. Then, we set TX power limit according to chip generation. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231003015446.14658-5-pkshih@realtek.com
2023-10-05wifi: rtw89: phy: set TX power offset according to chip genZong-Zhe Yang
We have a register to control TX power of each rate section to increase or decrease an offset. But, Wi-Fi 6 chips and Wi-Fi 7 chips have different address and format for this control register. We rename original setting stuffs with a suffix `_ax` and implement setting flow for Wi-Fi 7 chips. Then, we set TX power offset according to chip generation. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231003015446.14658-4-pkshih@realtek.com
2023-10-05wifi: rtw89: phy: set TX power by rate according to chip genZong-Zhe Yang
Wi-Fi 6 chips and Wi-Fi 7 chips have different register design for TX power by rate. We rename original setting stuffs with a suffix `_ax` and implement setting flow for Wi-Fi 7 chips. Then, we set TX power by rate according to chip generation. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231003015446.14658-3-pkshih@realtek.com
2023-09-22wifi: rtw89: load TX power related tables from FW elementsZong-Zhe Yang
The following FW elements are recognized, and then the valid entries in them are loaded into SW struct case by case. * TX power by rate * TX power limit 2 GHz * TX power limit 5 GHz * TX power limit 6 GHz * TX power limit RU 2 GHz * TX power limit RU 5 GHz * TX power limit RU 6 GHz * TX shape limit * TX shape limit RU One single firmware file can contain multiples of each of the above FW elements. Each of them is configured with a target RFE (RF front end) type. We choose one of the multiples to load based on RFE type. If there are multiples of the same FW elements with the same target RFE type. The last one will be applied. We don't want to have many loading variants for above FW elements. Even if between different chips or between different generations, we would like to maintain only one single set of loadings. So, the loadings are designed to consider compatibility. The main concepts are listed below. * The driver structures, which are used to cast binary entry from FW, cannot insert new members in the middle. If there are something new, they should always be appended at the tail. * Each binary entry from FW uses a dictionary way containing a key set and a data. The keys in the key set indicate where to put the data. * If size of driver struct and size of binary entry do not match when loading, it means the number of keys in the key set are different. Then, we deal with compatibility. No matter which one has more keys, we take/use zero on those mismatched keys. If driver struct is bigger (backward compatibility): e.g. SW uses two keys, but FW is built with one key. Then, put the data of FW(keyX) into SW[keyX][0]. If binary entry is bigger (forward compatibility): e.g. FW is built with two keys, but SW uses one key. Then, only take the data of FW(keyX, keyY = 0) into SW[keyX] Besides, chip info setup flow is tweaked a bit for the following. * Before loading FW elements, we need to determine chip RFE via efuse. * Setting up RFE parameters depends on loading FW elements ahead. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230920074322.42898-8-pkshih@realtek.com
2023-08-25wifi: rtw89: phy: modify register setting of ENV_MNTR, PHYSTS and DIGCheng-Chieh Hsieh
The ENV_MNTR(environment monitor) is the dynamic mechanism which based on the HW of CCX(Cisco Compatible Extensions) which provide the channel loading and noisy level indicator to debug or support the 802.11k. The PHYSTS provide the detail PHY information per packet we received for debugging. The DIG(dynamic initial gain) is the dynamic mechanism to adjust the packet detect power level by received signal strength to avoid false detection of the WiFi packet. The address of registers used for ENV_MNTR, PHYSTS and DIG of WiFi 7 IC are different with WiFi 6 series, so we modify the method to access the register address in order to compatible with all WiFi 7 and 6 ICs. Signed-off-by: Cheng-Chieh Hsieh <cj.hsieh@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230822125822.23817-7-pkshih@realtek.com
2023-08-25wifi: rtw89: phy: add phy_gen_def::cr_base to support WiFi 7 chipsPing-Ke Shih
cr_base is base address of PHY control register. The base of WiFi 6 and 7 chips are 0x1_0000 and 0x2_0000 respectively, so define them accordingly. For example, if PHY address is 0x1330, absolute address is 0x1_1330 for WiFi 6 chips, and 0x2_1330 for WiFi 7 chips. Meanwhile, there are two copies of PHY hardware named PHY0 and PHY1. The offset between them is 0x2_0000, so the base address of PHY0 and PHY1 are 0x2_0000 and 0x4_0000 respectively. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230822125822.23817-6-pkshih@realtek.com
2023-05-05wifi: rtw89: add RSSI based antenna diversityEric Huang
RSSI statistics are grouped by CCK, OFDM or non-legacy rate. These statistics will be collected in training state for both (main/aux) antenna. There is a time period (ANTDIV_DELAY) for rate adaptive settle down before start collect statistics when switch antenna. Antenna diversity checks packet count from training state for each group and use the most one as the final RSSI for comparison, and then choose the better one as target antenna. Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230418012820.5139-7-pkshih@realtek.com
2023-04-03wifi: rtw89: config EDCCA threshold during scan to prevent TX failedChih-Kang Chang
Need to configure EDCCA threshold to default value before scan, and recall original value after scan to prevent probe request can't be sent out. Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230322060238.43922-1-pkshih@realtek.com
2023-02-22wifi: rtw89: adjust channel encoding to common functionPo-Hao Huang
Since the range of channel table is identical among ICs. Make channel encode/decode function common and not IC dependent. So all ICs with matching firmware that needs this kind of coding can use it directly. This patch doesn't change logic at all. Signed-off-by: Po-Hao Huang <phhuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230220070202.29868-4-pkshih@realtek.com
2022-11-22wifi: rtw89: switch BANDEDGE and TX_SHAPE based on OFDMA trigger frameEric Huang
There are some registers for transmit waveform control, two of them used in this change are for BANDEDGE and TX_SHAPE control. BANDEDGE controls whether to apply band edge filter to transmit waveform. TX_SHAPE controls whether to apply triangular mask to transmit waveform. It is found for some chip, these two should be turned off during OFDMA UL traffic for better performance. Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221117063001.42967-3-pkshih@realtek.com
2022-11-01wifi: rtw89: collect and send RF parameters to firmware for WoWLANChih-Kang Chang
For WoWLAN mode, we only collect and send RF parameters to Firmware without writing RF registers. So we add one function to practice it. Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221027052707.14605-2-pkshih@realtek.com
2022-10-19wifi: rtw89: phy: add dummy C2H handler to avoid warning messagePing-Ke Shih
The C2H class 2 function 3 is to report retry count of low rate, but driver doesn't implement yet, so add a dummy case to avoid message: rtw89_8852be 0000:03:00.0: c2h class 2 not support Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221014060237.29050-4-pkshih@realtek.com
2022-10-11wifi: rtw89: 8852b: add chip_ops::set_channelPing-Ke Shih
set_channel is main function to configure channel and bandwidth for all layers, namely MAC, BB and RF. Additionally, MAC layer enables CCK rate checking to avoid wrong rate from driver. BB layer configures SCO (Sample Clock Offset) for CCK, TX gain error/offset, and reset baseband hardware circuit after all configurations done. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221005083212.45683-7-pkshih@realtek.com
2022-10-11wifi: rtw89: make generic functions to convert subband gain indexPing-Ke Shih
The gain tables use different domain index, so we need to convert the index from subband of chandef. Since these conversion functions can share with 8852b, make generic functions for further use. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221005083212.45683-6-pkshih@realtek.com
2022-10-04wifi: rtw89: phy: make generic txpwr setting functionsZong-Zhe Yang
Previously, we thought control registers or setting things for TX power series may change according to chip. So, setting functions are implemented chip by chip. However, until now, the functions keep the same among chips, at least 8852A, 8852C, and 8852B. There is a sufficient number of chips to share generic setting functions. So, we now remake them including TX power by rate, TX power offset, TX power limit, and TX power limit RU as generic ones in phy.c. Besides, there are some code refinements in the generic ones, but almost all of the logic doesn't change. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220928084336.34981-5-pkshih@realtek.com
2022-09-12wifi: rtw89: support TX diversity for 1T2R chipsetPing-Ke Shih
Check RSSI strength to decide which path is better, and then set TX path accordingly. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220908074140.39776-6-pkshih@realtek.com
2022-09-02wifi: rtw89: enlarge the CFO tracking boundaryCheng-Chieh Hsieh
The calibration value of XTAL offset may be too large in some wifi modules, that the CFO tracking mechanism under the existing tracking boundary can not adjust the CFO to the tolerable range. So we enlarge it. Signed-off-by: Cheng-Chieh Hsieh <cj.hsieh@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220824061425.13764-1-pkshih@realtek.com
2022-09-02wifi: rtw89: txpwr: concentrate channel related control to topZong-Zhe Yang
For future support on multiple channels, it would be disturbing if we still allow scattered leaf functions of TX power to query and manage channel related control by themselves. So, query rtw89_chan only on top functions. Then, pass it via functions to make sure that the values coming from the same struct rtw89_chan. Besides, fix rtw8852a_set_txpwr_offset() from rtw8852a_set_txpwr_ctrl() to rtw8852a_set_txpwr(). TX power offset should consider current band, so move it to chip_ops::set_txpwr() which will be called every time that channel is set. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220809104952.61355-6-pkshih@realtek.com
2022-09-02wifi: rtw89: introduce rtw89_chan for channel stuffsZong-Zhe Yang
Introduce struct rtw89_chan ahead to encapsulate stuffs from struct rtw89_channel_params. These stuffs have a clone in HAL and are used throughout driver. After multiple channels support, it's expected that each channel instance has a configuration of them. So, we refine them with struct rtw89_chan by precise type first, and will re-arrange HAL by struct rtw89_chan in the following as well. (No logic has changed.) Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220809104952.61355-3-pkshih@realtek.com
2022-06-10rtw89: add new state to CFO state machine for UL-OFDMAEric Huang
Add an new state, RTW89_PHY_DCFO_STATE_HOLD, to keep CFO acceleration after CFO_PERIOD_CNT if the traffic is UL-OFDMA, which is calculated based on RX trigger frame counter. Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220608113224.11193-4-pkshih@realtek.com
2022-05-17rtw89: add ieee80211::sta_rc_update opsPing-Ke Shih
When peer's NSS, rate or bandwidth is changed, we update RA(rate adaptive) mask to ensure transmitting packets properly. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220516005215.5878-2-pkshih@realtek.com
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