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path: root/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
AgeCommit message (Expand)Author
2016-12-28pinctrl: aspeed-g5: Add mux configuration for all pinsAndrew Jeffery
2016-12-27pinctrl: aspeed: Read and write bits in LPC and GFX controllersAndrew Jeffery
2016-11-07pinctrl-aspeed-g5: Never set SCU90[6]Andrew Jeffery
2016-10-18pinctrl: aspeed-g5: Fix pin association of SPI1 functionAndrew Jeffery
2016-10-18pinctrl: aspeed-g5: Fix GPIOE1 typoAndrew Jeffery
2016-10-18pinctrl: aspeed-g5: Fix names of GPID2 pinsAndrew Jeffery
2016-09-07pinctrl: Add pinctrl-aspeed-g5 driverAndrew Jeffery