Age | Commit message (Expand) | Author |
---|---|---|
2016-12-28 | pinctrl: aspeed-g5: Add mux configuration for all pins | Andrew Jeffery |
2016-12-27 | pinctrl: aspeed: Read and write bits in LPC and GFX controllers | Andrew Jeffery |
2016-11-07 | pinctrl-aspeed-g5: Never set SCU90[6] | Andrew Jeffery |
2016-10-18 | pinctrl: aspeed-g5: Fix pin association of SPI1 function | Andrew Jeffery |
2016-10-18 | pinctrl: aspeed-g5: Fix GPIOE1 typo | Andrew Jeffery |
2016-10-18 | pinctrl: aspeed-g5: Fix names of GPID2 pins | Andrew Jeffery |
2016-09-07 | pinctrl: Add pinctrl-aspeed-g5 driver | Andrew Jeffery |