1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
|
/*
* Copyright 2012-15 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#include "dm_services.h"
#include "ObjectID.h"
#include "atomfirmware.h"
#include "include/bios_parser_types.h"
#include "command_table_helper2.h"
bool dal_bios_parser_init_cmd_tbl_helper2(
const struct command_table_helper **h,
enum dce_version dce)
{
switch (dce) {
case DCE_VERSION_8_0:
case DCE_VERSION_8_1:
case DCE_VERSION_8_3:
*h = dal_cmd_tbl_helper_dce80_get_table();
return true;
case DCE_VERSION_10_0:
*h = dal_cmd_tbl_helper_dce110_get_table();
return true;
case DCE_VERSION_11_0:
*h = dal_cmd_tbl_helper_dce110_get_table();
return true;
case DCE_VERSION_11_2:
case DCE_VERSION_11_22:
*h = dal_cmd_tbl_helper_dce112_get_table2();
return true;
#if defined(CONFIG_DRM_AMD_DC_DCN)
case DCN_VERSION_1_0:
case DCN_VERSION_1_01:
*h = dal_cmd_tbl_helper_dce112_get_table2();
return true;
#endif
case DCN_VERSION_2_0:
*h = dal_cmd_tbl_helper_dce112_get_table2();
return true;
case DCN_VERSION_2_1:
*h = dal_cmd_tbl_helper_dce112_get_table2();
return true;
case DCE_VERSION_12_0:
case DCE_VERSION_12_1:
*h = dal_cmd_tbl_helper_dce112_get_table2();
return true;
default:
/* Unsupported DCE */
BREAK_TO_DEBUGGER();
return false;
}
}
/* real implementations */
bool dal_cmd_table_helper_controller_id_to_atom2(
enum controller_id id,
uint8_t *atom_id)
{
if (atom_id == NULL) {
BREAK_TO_DEBUGGER();
return false;
}
switch (id) {
case CONTROLLER_ID_D0:
*atom_id = ATOM_CRTC1;
return true;
case CONTROLLER_ID_D1:
*atom_id = ATOM_CRTC2;
return true;
case CONTROLLER_ID_D2:
*atom_id = ATOM_CRTC3;
return true;
case CONTROLLER_ID_D3:
*atom_id = ATOM_CRTC4;
return true;
case CONTROLLER_ID_D4:
*atom_id = ATOM_CRTC5;
return true;
case CONTROLLER_ID_D5:
*atom_id = ATOM_CRTC6;
return true;
/* TODO :case CONTROLLER_ID_UNDERLAY0:
*atom_id = ATOM_UNDERLAY_PIPE0;
return true;
*/
case CONTROLLER_ID_UNDEFINED:
*atom_id = ATOM_CRTC_INVALID;
return true;
default:
/* Wrong controller id */
BREAK_TO_DEBUGGER();
return false;
}
}
/**
* translate_transmitter_bp_to_atom
*
* @brief
* Translate the Transmitter to the corresponding ATOM BIOS value
*
* @param
* input transmitter
* output digitalTransmitter
* // =00: Digital Transmitter1 ( UNIPHY linkAB )
* // =01: Digital Transmitter2 ( UNIPHY linkCD )
* // =02: Digital Transmitter3 ( UNIPHY linkEF )
*/
uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2(
enum transmitter t)
{
switch (t) {
case TRANSMITTER_UNIPHY_A:
case TRANSMITTER_UNIPHY_B:
case TRANSMITTER_TRAVIS_LCD:
return 0;
case TRANSMITTER_UNIPHY_C:
case TRANSMITTER_UNIPHY_D:
return 1;
case TRANSMITTER_UNIPHY_E:
case TRANSMITTER_UNIPHY_F:
return 2;
default:
/* Invalid Transmitter Type! */
BREAK_TO_DEBUGGER();
return 0;
}
}
uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom2(
enum signal_type s,
bool enable_dp_audio)
{
switch (s) {
case SIGNAL_TYPE_DVI_SINGLE_LINK:
case SIGNAL_TYPE_DVI_DUAL_LINK:
return ATOM_ENCODER_MODE_DVI;
case SIGNAL_TYPE_HDMI_TYPE_A:
return ATOM_ENCODER_MODE_HDMI;
case SIGNAL_TYPE_LVDS:
return ATOM_ENCODER_MODE_LVDS;
case SIGNAL_TYPE_EDP:
case SIGNAL_TYPE_DISPLAY_PORT_MST:
case SIGNAL_TYPE_DISPLAY_PORT:
case SIGNAL_TYPE_VIRTUAL:
if (enable_dp_audio)
return ATOM_ENCODER_MODE_DP_AUDIO;
else
return ATOM_ENCODER_MODE_DP;
case SIGNAL_TYPE_RGB:
return ATOM_ENCODER_MODE_CRT;
default:
return ATOM_ENCODER_MODE_CRT;
}
}
bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src2(
enum clock_source_id id,
uint32_t *ref_clk_src_id)
{
if (ref_clk_src_id == NULL) {
BREAK_TO_DEBUGGER();
return false;
}
switch (id) {
case CLOCK_SOURCE_ID_PLL1:
*ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL;
return true;
case CLOCK_SOURCE_ID_PLL2:
*ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL;
return true;
/*TODO:case CLOCK_SOURCE_ID_DCPLL:
*ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL;
return true;
*/
case CLOCK_SOURCE_ID_EXTERNAL:
*ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK;
return true;
case CLOCK_SOURCE_ID_UNDEFINED:
*ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID;
return true;
default:
/* Unsupported clock source id */
BREAK_TO_DEBUGGER();
return false;
}
}
uint8_t dal_cmd_table_helper_encoder_id_to_atom2(
enum encoder_id id)
{
switch (id) {
case ENCODER_ID_INTERNAL_LVDS:
return ENCODER_OBJECT_ID_INTERNAL_LVDS;
case ENCODER_ID_INTERNAL_TMDS1:
return ENCODER_OBJECT_ID_INTERNAL_TMDS1;
case ENCODER_ID_INTERNAL_TMDS2:
return ENCODER_OBJECT_ID_INTERNAL_TMDS2;
case ENCODER_ID_INTERNAL_DAC1:
return ENCODER_OBJECT_ID_INTERNAL_DAC1;
case ENCODER_ID_INTERNAL_DAC2:
return ENCODER_OBJECT_ID_INTERNAL_DAC2;
case ENCODER_ID_INTERNAL_LVTM1:
return ENCODER_OBJECT_ID_INTERNAL_LVTM1;
case ENCODER_ID_INTERNAL_HDMI:
return ENCODER_OBJECT_ID_HDMI_INTERNAL;
case ENCODER_ID_EXTERNAL_TRAVIS:
return ENCODER_OBJECT_ID_TRAVIS;
case ENCODER_ID_EXTERNAL_NUTMEG:
return ENCODER_OBJECT_ID_NUTMEG;
case ENCODER_ID_INTERNAL_KLDSCP_TMDS1:
return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1;
case ENCODER_ID_INTERNAL_KLDSCP_DAC1:
return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1;
case ENCODER_ID_INTERNAL_KLDSCP_DAC2:
return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2;
case ENCODER_ID_EXTERNAL_MVPU_FPGA:
return ENCODER_OBJECT_ID_MVPU_FPGA;
case ENCODER_ID_INTERNAL_DDI:
return ENCODER_OBJECT_ID_INTERNAL_DDI;
case ENCODER_ID_INTERNAL_UNIPHY:
return ENCODER_OBJECT_ID_INTERNAL_UNIPHY;
case ENCODER_ID_INTERNAL_KLDSCP_LVTMA:
return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA;
case ENCODER_ID_INTERNAL_UNIPHY1:
return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1;
case ENCODER_ID_INTERNAL_UNIPHY2:
return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2;
case ENCODER_ID_INTERNAL_UNIPHY3:
return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3;
case ENCODER_ID_INTERNAL_WIRELESS:
return ENCODER_OBJECT_ID_INTERNAL_VCE;
case ENCODER_ID_INTERNAL_VIRTUAL:
return ENCODER_OBJECT_ID_NONE;
case ENCODER_ID_UNKNOWN:
return ENCODER_OBJECT_ID_NONE;
default:
/* Invalid encoder id */
BREAK_TO_DEBUGGER();
return ENCODER_OBJECT_ID_NONE;
}
}
|