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authorArnd Bergmann <arnd@arndb.de>2024-11-12 22:53:47 +0100
committerArnd Bergmann <arnd@arndb.de>2024-11-12 22:53:47 +0100
commit2f992e73462a72397ce6e49a39c6096141ba2838 (patch)
treea5d8609c7153cbb3c2237437ef115e6a32533fd6 /arch/arm
parentd745bdcb7ad0b0dba6c7c38f7dd53df1b352920c (diff)
parentb0191a5cbc222fc7af3f9511b44d1f330ef980e9 (diff)
Merge tag 'stm32-dt-for-v6.13-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.13, round 1 Highlights: ---------- - MPU: - STM32MP13: - ST DK board: - Add support of WLAN/BT Murata Type 1DX module. - DH SOM: - Add M24256E EEPROM suport. - STMP32MP15: - Use IWDG2 as wakeup source. - Add support of WLAN/BT Murata Type 1DX module on DK2 board. - STM32MP25: - Enable RTC. - Add DMA support for U(S)ART, I2C and SPI instances. * tag 'stm32-dt-for-v6.13-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: arm64: dts: st: add DMA support on SPI instances of stm32mp25 arm64: dts: st: add DMA support on I2C instances of stm32mp25 arm64: dts: st: add DMA support on U(S)ART instances of stm32mp25 arm64: dts: st: add RNG node on stm32mp251 arm64: dts: st: enable RTC on stm32mp257f-ev1 board arm64: dts: st: add RTC on stm32mp25x ARM: dts: stm32: add support of WLAN/BT on stm32mp135f-dk ARM: dts: stm32: add support of WLAN/BT on stm32mp157c-dk2 ARM: dts: stm32: rtc, add LSCO to WLAN/BT module on stm32mp135f-dk ARM: dts: stm32: rtc, add LSCO to WLAN/BT module on stm32mp157c-dk2 ARM: dts: stm32: rtc, add pin to provide LSCO on stm32mp13 ARM: dts: stm32: rtc, add pin to provide LSCO on stm32mp15 ARM: dts: stm32: Describe M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT ARM: dts: stm32: Add IWDG2 EXTI interrupt mapping and mark as wakeup source Link: https://lore.kernel.org/r/92d2d6df-cc5c-488f-8ebd-550b1903db12@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi7
-rw-r--r--arch/arm/boot/dts/st/stm32mp135f-dk.dts52
-rw-r--r--arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi6
-rw-r--r--arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi7
-rw-r--r--arch/arm/boot/dts/st/stm32mp151.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stm32mp157c-dk2.dts51
6 files changed, 124 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
index 8db1ec4a3b26..a422b32d71d1 100644
--- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
@@ -595,6 +595,13 @@
};
/omit-if-no-ref/
+ rtc_rsvd_pins_a: rtc-rsvd-0 {
+ pins {
+ pinmux = <STM32_PINMUX('I', 1, ANALOG)>; /* RTC_OUT2_RMP */
+ };
+ };
+
+ /omit-if-no-ref/
sai1a_pins_a: sai1a-0 {
pins {
pinmux = <STM32_PINMUX('A', 4, AF12)>, /* SAI1_SCK_A */
diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
index 1af335a39993..3a276589fef7 100644
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -121,6 +121,19 @@
};
};
};
+
+ v3v3_ao: v3v3-ao {
+ compatible = "regulator-fixed";
+ regulator-name = "v3v3_ao";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&mcp23017 11 GPIO_ACTIVE_LOW>;
+ };
};
&adc_1 {
@@ -346,7 +359,14 @@
};
&rtc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_rsvd_pins_a>;
status = "okay";
+
+ rtc_lsco_pins_a: rtc-lsco-0 {
+ pins = "out2_rmp";
+ function = "lsco";
+ };
};
&scmi_regu {
@@ -385,6 +405,30 @@
status = "okay";
};
+/* Wifi */
+&sdmmc2 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_clk_pins_a>;
+ pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_clk_pins_a>;
+ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
+ non-removable;
+ cap-sdio-irq;
+ st,neg-edge;
+ bus-width = <4>;
+ vmmc-supply = <&v3v3_ao>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_lsco_pins_a>;
+ };
+};
+
&spi5 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi5_pins_a>;
@@ -491,6 +535,14 @@
pinctrl-2 = <&usart2_idle_pins_a>;
uart-has-rtscts;
status = "okay";
+
+ bluetooth {
+ shutdown-gpios = <&mcp23017 13 GPIO_ACTIVE_HIGH>;
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <3000000>;
+ vbat-supply = <&v3v3_ao>;
+ vddio-supply = <&v3v3_ao>;
+ };
};
&usbh_ehci {
diff --git a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
index ddad6497775b..5edbc790d1d2 100644
--- a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
@@ -201,6 +201,12 @@
pagesize = <64>;
};
+ eeprom0wl: eeprom@58 {
+ compatible = "st,24256e-wl"; /* ST M24256E WL page of 0x50 */
+ pagesize = <64>;
+ reg = <0x58>;
+ };
+
rv3032: rtc@51 {
compatible = "microcrystal,rv3032";
reg = <0x51>;
diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
index 70e132dc6147..95fafc51a1c8 100644
--- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
@@ -1697,6 +1697,13 @@
};
/omit-if-no-ref/
+ rtc_rsvd_pins_a: rtc-rsvd-0 {
+ pins {
+ pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */
+ };
+ };
+
+ /omit-if-no-ref/
sai2a_pins_a: sai2a-0 {
pins {
pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi
index 4f878ec102c1..b28dc90926bd 100644
--- a/arch/arm/boot/dts/st/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp151.dtsi
@@ -355,6 +355,8 @@
reg = <0x5a002000 0x400>;
clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
clock-names = "pclk", "lsi";
+ interrupts-extended = <&exti 46 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts
index 7a701f7ef0c7..5f9c0160a9c4 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts
@@ -24,6 +24,11 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpioh 4 GPIO_ACTIVE_LOW>;
+ };
};
&cryp1 {
@@ -84,10 +89,54 @@
};
};
+&rtc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_rsvd_pins_a>;
+
+ rtc_lsco_pins_a: rtc-lsco-0 {
+ pins = "out2_rmp";
+ function = "lsco";
+ };
+};
+
+/* Wifi */
+&sdmmc2 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc2_b4_pins_a>;
+ pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
+ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
+ non-removable;
+ cap-sdio-irq;
+ st,neg-edge;
+ bus-width = <4>;
+ vmmc-supply = <&v3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_lsco_pins_a>;
+ };
+};
+
+/* Bluetooth */
&usart2 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&usart2_pins_c>;
pinctrl-1 = <&usart2_sleep_pins_c>;
pinctrl-2 = <&usart2_idle_pins_c>;
- status = "disabled";
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <3000000>;
+ vbat-supply = <&v3v3>;
+ vddio-supply = <&v3v3>;
+ };
};