diff options
| author | Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | 2021-05-19 10:47:22 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-06-04 16:03:26 -0400 |
| commit | 118a331516581c3acf1279857b0f663a54b7f31b (patch) | |
| tree | 6131f4a3a232dd54c1e194a68bbd9f22e237975b /drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | |
| parent | d997ea5c58bb1c05df9e1f6eb030f6647d938eac (diff) | |
drm/amd/display: Add DCN3.1 clock manager support
Adds support for clock requests for the various parts of the DCN3.1 IP
and the interfaces and definitions for sending messages to SMU/PMFW.
Includes new support for z9/10, detecting SMU timeout and p-state
support enablement.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h index 5dc8d02b40c3..90dbe26bf954 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h @@ -91,6 +91,9 @@ struct clk_limit_table_entry { unsigned int dispclk_mhz; unsigned int dppclk_mhz; unsigned int phyclk_mhz; +#ifdef CONFIG_DRM_AMD_DC_DCN3_1 + unsigned int wck_ratio; +#endif }; /* This table is contiguous */ |