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path: root/drivers/gpu/drm/i915/display/intel_display_power_well.c
AgeCommit message (Expand)Author
2024-10-30drm/i915/power: convert assert_chv_phy_status() to struct intel_displayJani Nikula
2024-10-30drm/i915/dpio: convert to struct intel_displayJani Nikula
2024-09-23drm/i915/pps: split intel_pps_reset_all() to vlv and bxt variantsJani Nikula
2024-09-11drm/i915/dmc: Convert DMC code to intel_displayVille Syrjälä
2024-09-11drm/i915/power: Convert "i830 power well" code to intel_displayVille Syrjälä
2024-09-11drm/i915/vga: Convert VGA code to intel_displayVille Syrjälä
2024-09-11drm/i915/power: Convert low level DC state code to intel_displayVille Syrjälä
2024-09-11drm/i915/cdclk: Convert CDCLK code to intel_displayVille Syrjälä
2024-09-03drm/i915/pps: convert intel_pps.[ch] to struct intel_displayJani Nikula
2024-08-21drm/i915: move rawclk from runtime to display runtime infoJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANSCONFJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to DPLLJani Nikula
2024-04-30drm/i915/dpio: Extract vlv_dpio_phy_regs.hVille Syrjälä
2024-04-30drm/i915/dpio: Clean up the vlv/chv PHY register bitsVille Syrjälä
2024-04-30drm/i915/dpio: Rename a few CHV DPIO PHY registersVille Syrjälä
2024-04-19drm/i915/dpio: s/ddi/dpio/ for bxt/glk PHY stuffVille Syrjälä
2024-04-18drm/i915/dmc: convert dmc wakelock interface to struct intel_displayJani Nikula
2024-04-17drm/i915/display: tie DMC wakelock to DC5/6 state transitionsLuca Coelho
2024-03-26drm/i915/de: register wait function renamesJani Nikula
2024-03-21drm/i915/display: use intel_encoder_is/to_* functionsJani Nikula
2024-03-20drm/i915: Rename ICL_PORT_TX_DW6 bitsVille Syrjälä
2024-03-07drm/i915: Streamline eDP handling in icl_combo_phy_aux_power_well_enable()Ville Syrjälä
2024-03-07drm/i915: Use pw_idx to derive PHY for ICL_LANE_ENABLE_AUX overrideVille Syrjälä
2024-03-07drm/i915: Rename ICL_AUX_ANAOVRD1 to ICL_PORT_TX_DW6_AUXVille Syrjälä
2024-02-29drm/i915: Simplify aux_ch_to_digital_port()Ville Syrjälä
2024-02-29drm/i915: Don't explode when the dig port we don't have an AUX CHVille Syrjälä
2024-02-28drm/i915/cdclk: Rename intel_cdclk_needs_modeset to intel_cdclk_clock_changedGustavo Sousa
2023-11-17drm/i915: convert vlv_dpio_read()/write() from pipe to phyJani Nikula
2023-09-21drm/i915/xe2lpd: Add display power wellRavi Kumar Vodapalli
2023-09-21drm/i915/xe2lpd: Re-order DP AUX regsLucas De Marchi
2023-08-31drm/i915/mtl: Add TC port lockdep assert to AUX power well enablingImre Deak
2023-05-16drm/i915/irq: split out display irq handlingJani Nikula
2023-04-27drm/i915/display: Increase AUX timeout for Type-CSuraj Kandpal
2023-04-19drm/i915: use explicit includes for i915_reg.h and i915_irq.hJani Nikula
2023-03-30drm/i915/aux: split out DP AUX regs to a separate fileJani Nikula
2023-03-30drm/i915: Make utility pin asserts more accurateVille Syrjälä
2023-03-06drm/i915/power: move dc state members to struct i915_power_domainsJani Nikula
2023-02-21drm/i915/display/power: use intel_de_rmw if possibleAndrzej Hajda
2023-02-17drm/i915: s/PIPECONF/TRANSCONF/Ville Syrjälä
2023-02-14drm/i915: Consult the registered encoders for the ICL combo PHY w/aVille Syrjälä
2022-10-26drm/i915/tgl+: Sanitize DKL PHY register definitionsImre Deak
2022-10-26drm/i915/tgl+: Move DKL PHY register definitions to intel_dkl_phy_regs.hImre Deak
2022-10-26drm/i915/tgl+: Add locking around DKL PHY register accessesImre Deak
2022-09-12drm/i915/mtl: Add display power wellsImre Deak
2022-09-09drm/i915: Extract skl_watermark.cVille Syrjälä
2022-08-31drm/i915/reg: stop using implicit dev_priv in DSPCLK_GATE_DJani Nikula
2022-08-31drm/i915: move dbuf under display sub-structJani Nikula
2022-08-31drm/i915: move and group power related members under display.powerJani Nikula
2022-08-31drm/i915: move and group cdclk under display.cdclkJani Nikula
2022-08-29drm/i915: move dmc to display.dmcJani Nikula
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